Business Wire

MIPI M-PHY Update Doubles Peak Data Rate for Next-Generation Flash Memory Storage Applications

PISCATAWAY, N.J.--(BUSINESS WIRE)--The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced a major update ...
Business Wire

Kioxia First to Introduce Next-Generation UFS Embedded Flash Memory Devices Supporting MIPI M-PHY v5.0

TOKYO--(BUSINESS WIRE)--Kioxia Corporation, a world leader in memory solutions, today announced sampling [1] of the industry’s first [2] Universal Flash Storage [3] (UFS) embedded flash memory devices ...
Semiconductor Engineering

Week In Review: Design, Low Power

Cadence will acquire Rambus’ SerDes and memory interface PHY IP business. Rambus will retain its digital IP business, including memory and interface controllers and security IP. “With this transaction ...
Design And Reuse

SkyeChip's World-First HBM4/HBM3E Combo PHY IP for SF4X Listed on Samsung Foundry CONNECT

SkyeChip Berhad today announced that its HBM4/HBM3E combo PHY IP has been officially listed on Samsung Foundry CONNECT, Samsung Foundry's IP ecosystem platform. As the world's first combined ...
Design-Reuse

DDR5/LPDDR5/DDR4 Combo PHY & Controller IP Core in 12FFC - Eliminating Memory Interface Risk

A breakthrough in memory subsystem integration is redefining performance, flexibility, and time-to-market for advanced SoC designs. A fully silicon-proven DDR5/LPDDR5/DDR4 Combo PHY & Controller IP ...